SPA 5.0:
{@{!}Pg}
VSET.cmp{.safmt.sbfmt}{.op2}
Rd{.CC}, Ra{.partselA}, Rb{.partselB}, Rc
{&req_6}
{?sched}
;
.cmp: { .F, .LT, .EQ, .LE, .GT, .NE, .GE, .T } Unsigned and signed comparisons .safmt: { .U32, .S32*, .U16, .S16, .U8, .S8} .sbfmt: { .U32, .S32*, .U16, .S16, .U8, .S8} .ifmt: { .U16, .S16* } Source formats .op2: { .PASS*, .MRG_16H, .MRG_16L, .MRG_8B0, .MRG_8B2, .ACC, .MIN, .MAX} .CC: Write condition codes .partselA: if (.U8|.S8) { .B0*, .B1, .B2, .B3} if (.U16|.S16) { .H0*, .H1} .partselB: if (.U8|.S8) { .B0*, .B1, .B2, .B3} if (.U16|.S16) { .H0*, .H1}
{@{!}Pg}
VSET.cmp{.safmt.ifmt}{.op2}
Rd{.CC}, Ra{.partselA}, #imm16, Rc
{&req_6}
{?sched}
;
VSET.cmp compares register Ra.partselA and source operand Rb.partselB or #imm16 with comparison operation .cmp, and sets destination register Rd to Boolean integer value 1 if the comparison is true, otherwise it sets Rd to 0. The optional second stage operation .op2 combines the Boolean comparison result with Rc and sets Rd.
The comparison test .cmp is specified by one of 8 (.F, .LT, .EQ, .LE, .GT, .NE, .GE, .T) The result is 0x1 (comparison TRUE) or 0x0 (comparison FALSE).
The sign of the intermediate result is always unsigned. There is no saturation.
VSET.NE.U32.S32.ACC R0, R1, R2, R3; VSET.LT.S32.S32.MIN R0, R1, R2, RZ; VSET.NE.U32.S16.ACC R0, R1, 0xfffe, R3; VSET.LT.S32.S16.MIN R0, R1, 4, RZ;