SPA 5.0:{@{!}Pg}ISETP.cmp{.fmt}{.X}Pu, Ra, Sb{&req_6}{?sched};.cmp: { .F, .LT, .EQ, .LE, .GT, .NE, .GE, .T } Unsigned and signed comparisons { .LO, .LS, .HI, .HS, } Unsigned comparisons only .fmt: { .U32, .S32* } Default compare format is signed .S32, except unsigned .LO, .LS, .HI, .HS where the default compare format is .U32. The assembler throws a syntax error if signed format .S32 is explicitly combined with an unsigned comparison test. .X Extended precision compare .bop: { .AND, .OR, .XOR } Boolean op with predicate {!}Pp ISETP allows the following for Sb: Rb 32-bit register c[ImmU05][ImmU16] 32-bit constant with immediate slot and byte address ImmS20 32-bit sign-extended 20-bit immediate{@{!}Pg}ISETP.cmp{.fmt}{.X}.bopPu, Pv, Ra, Sb, {!}Pp{&req_6}{?sched};
ISETP.cmp.bop compares register Ra and source operand Sb with integer comparison operation .cmp, combines the Boolean comparison result with predicate operand {!}Pp using Boolean operation .bop, and sets two predicate registers Pu and Pv to Boolean values based on the comparison. The Boolean operation .bop may be .AND, .OR, or .XOR, corresponding to C Boolean operations &, |, and ^.
Pu = (Ra .cmp Sb) .bop {!}Pp;
Pv =(!(Ra .cmp Sb)) .bop {!}Pp;
The simple instruction format without .bop {!}Pp assembles as .AND PT, and Pv is PT, giving the following functionality:
Pu = (Ra .cmp Sb); // Set predicate to 1 if comparison test is true, else to 0
Extended integer compare suffix .cmp{.fmt}.X compares Ra and Sb by subtracting Ra - Sb with a borrow from the condition code carry flag CC.CF, i.e. by computing Ra + ~Sb + CC.CF, comparing that with zero, and considering the condition code zero flag CC.ZF set by a prior subtraction. ISETP.cmp.X may follow a sequence of IADD and IADD.X instructions that perform an extended-precision (multi-word) subtraction, thereby completing the most-significant word of an extended-precision comparison. ISETP.cmp.X determines whether the extended .cmp.X comparison test is zero by ANDing the extended compare difference zero-ness with the prior condition code zero flag CC.ZF.
Use .bop {!}Pp for nested predication, with an inner comparison of Ra vs. Sb, conditioned on outer predicate Pp. This example:
ISETP.LT.AND Pu, Pv, Ra, Sb, Pp;
sets predicate registers Pu and Pv for if/else (Ra < Rb), within a block predicated on Pp:
Pu = (Ra < Rb) & Pp;
Pv =(!(Ra < Rb)) & Pp;
ISETP.LT P1, R1, R2; // P1 = (R1.S32 < R2.S32); default signed format
ISETP.LT.S32 P1, R1, R2; // identical instruction with explicit signed format
ISETP.LO P1, R1, R2; // P1 = (R1.U32 < R2.U32); .LO => default unsigned format
ISETP.LO.U32 P1, R1, R2; // identical instruction with explicit unsigned format
ISETP.LT.U32 P1, R1, R2; // identical instruction with explicit unsigned format
ISETP.LO.AND P1, P4, R1, R2, !P3; // P1 = (R1.U32 < R2.U32) & !P3; P4 = !(R1.U32 < R2.U32) & !P3;
ISETP.LO.U32.AND P1, P4, R1, R2, !P3; // P1 = (R1.U32 < R2.U32) & !P3; P4 = !(R1.U32 < R2.U32) & !P3;
// compare extended 64-bit signed integers [R1,R0] <= [R3,R2]
IADD RZ.CC, R0, -R2; // subtract low word R0 - R2, CC.CF = carry-out, CC.ZF = zero-sum
ISETP.LE.S32.X P1, R1, R3; // high word extended compare (R1 <=.X R3) does extended subtract:
// diff = (R1 + ~R3 + CC.CF);
// P1 = ((diff < 0) || ((diff == 0) && CC.ZF));