SPA 5.0:
{@{!}Pg}
IMUL{.safmt.sbfmt}{.hilo}
Rd{.CC}, Ra, Sb
{&req_6}
{&rdN}
{&wrN}
{?sched}
;
.safmt: { .U32, .S32* } .sbfmt: { .U32, .S32* } .hilo: { .HI, .LO* } If .HI, write the upper 32 bits of the multiply result into Rd, else, write the lower 32 bits of the multiply result. .CC: Write condition codes IMUL allows the following source Sb: Sb(register) Sb(constant with immediate address) Sb(#IMM20)
{@{!}Pg}
IMUL32I{.safmt.sbfmt}{.hilo}
Rd{.CC}, Ra, #Imm32
{&req_6}
{&rdN}
{&wrN}
{?sched}
;
Multiply sources into destination.
The following modes are supported:
u32 * u32 -> u64[31:00] u32 * s32 -> s64[31:00] s32 * u32 -> s64[31:00] s32 * s32 -> s64[31:00] u32 * u32 -> u64[63:32] u32 * s32 -> s64[63:32] s32 * u32 -> s64[63:32] s32 * s32 -> s64[63:32]
Extended-precision multiplications are performed using the IMAD instruction instead of the IMUL instruction.
IMUL R0, R1, R2;