IMAD

SPA 5.0:
        {@{!}Pg}   IMAD{.safmt.sbfmt}{.hilo}{.PO}{.SAT}{.X}   Rd{.CC},{-}Ra,{-}Sb,{-}Sc    {&req_6}   {&rdN}   {&wrN}   {?sched}   ;   
        {@{!}Pg}   IMAD32I{.safmt.sbfmt}{.hilo}{.PO}          Rd{.CC},{-}Ra,#Imm32,{-}Rd   {&req_6}   {&rdN}   {&wrN}   {?sched}   ;   

 .safmt:     { .U32, .S32* }

 .sbfmt:     { .U32, .S32* }

 .hilo:      { .HI, .LO* } 
             If .HI, write the upper 32 bits of the multiply-accumulate result
             into Rd, else, write the lower 32 bits of the multiply-accumulate result.

 .PO:        Plus one (for averaging)      

 .SAT:       Saturate 
             .SAT is only allowed when both inputs are .S32 and .HI is specified.
             The result of the accumulate is clamped to the min/max S32 values instead of
             the default behavior of wrapping.

 .X:         Extended precision accumulate
             
 .CC:        Write condition codes

The following add modes exist for the combination of source negates and .X:
       (Ra*Sb)+Sc:     (Ra*Sb) +  Sc + 0               //
       (Ra*Sb)-Sc:     (Ra*Sb) + ~Sc + 1               //
      -(Ra*Sb)+Sc:    ~(Ra*Sb) +  Sc + 1               //
  .PO                  (Ra*Sb) +  Sc + 1               // for average
   .X  (Ra*Sb)+Sc:     (Ra*Sb) +  Sc + Carry           // extended precision mode
   .X  (Ra*Sb)-Sc:     (Ra*Sb) + ~Sc + Carry           // extended precision mode
   .X -(Ra*Sb)+Sc:    ~(Ra*Sb) +  Sc + Carry           // extended precision mode
   .X -(Ra*Sb)-Sc:     ILLEGAL                         // not supported

    Note: It is illegal to negate both Sc and the result of (Ra*Sb).
    Note: It is illegal to negate any source operand in .PO mode.
    Note: It is illegal to combine .PO with .X
    Note: Unsigned SAT is illegal.

IMAD allows the following sources Sb,Sc:
    Sb(register),                         Sc(register)
    Sb(constant with immediate address),  Sc(register)
    Sb(#Imm20),                           Sc(register)
    Sb(register),                         Sc(constant with immediate address)

IMAD32I requires that Rd and Rc be the same register.

Multiply and add sources into destination.

The following modes are supported:

   (u32 * u32)[31:00] +  Sc[31:00]
   (u32 * s32)[31:00] +  Sc[31:00]
   (s32 * u32)[31:00] +  Sc[31:00]
   (s32 * s32)[31:00] +  Sc[31:00]
   (u32 * u32)[63:32] + (Sc[31:00]<<32)
   (u32 * s32)[63:32] + (Sc[31:00]<<32)
   (s32 * u32)[63:32] + (Sc[31:00]<<32)
   (s32 * s32)[63:32] + (Sc[31:00]<<32)
   (s32 * s32)[63:32] + (Sc[31:00]<<32) with SAT     // Sc is assumed signed s32

IMAD.X may be used to perform an extended-precision multiplication. At the end of the extended-precision multiplication sequence, the condition code flags reflect the overall multi-word result. The sign, carry, and overflow flags are set as usual in .X mode, whereas the zero flag value is accumulated in .X mode.

IMAD : Integer Multiply And Add

Format:

Description:

Examples: