SPA 5.0:{@{!}Pg}IADD{.PO}{.SAT}{.X}Rd{.CC}, {-}Ra, {-}Sb{&req_6}{?sched};.PO: Plus one (for averaging) .SAT: Saturate When .SAT is specified, the inputs are treated as S32 values, and the result is clamped to the min/max S32 values instead of the default behavior of wrapping. .X: Upper bit extended precision add .CC: Write condition codes IADD, allows the following source Sb: Sb(register) Sb(constant with immediate address) Sb(#IMM20) The following add modes exist for the combination of source negates and .X: Ra+Sb: Ra + Sb + 0 // Ra-Sb: Ra + ~Sb + 1 // -Ra+Sb: ~Ra + Sb + 1 // .PO : Ra + Sb + 1 // for average .X Ra+Sb: Ra + Sb + Carry // extended precision mode .X Ra-Sb: Ra + ~Sb + Carry // extended precision mode .X -Ra+Sb: ~Ra + Sb + Carry // extended precision mode .X -Ra-Sb: ILLEGAL // not supported Note: It is illegal to negate both sources at the same time. Note: It is illegal to negate either source operand in .PO mode. Note: It is illegal to combine .PO with .X{@{!}Pg}IADD32I{.PO}{.SAT}{.X}Rd{.CC}, {-}Ra, #Imm32{&req_6}{?sched};
Add sources into destination with possible saturate. Supports 2's complement addition/subtraction via optional "-" on sources.
An extended-precision add is performed by processing words in order from least-significant to most-significant, adding with carry-in for all but the initial IADD. At the end of the extended-precision add sequence, the condition code flags reflect the overall multi-word result. The sign, carry, and overflow flags are set as usual in .X mode, whereas the zero flag value is accumulated in .X mode. See example at bottom.
IADD R0,R1,R2;