SPA 5.0:
{@{!}Pg} FMNMX{.FTZ} Rd{.CC},{-}{|}Ra{|},{-}{|}Sb{|},{!}SPa {&req_6} {?sched} ;
.FTZ: Denorm inputs are flushed to sign preserving 0.0.
.CC: Write condition codes
FMNMX allows the following source Sb:
Sb(register)
Sb(constant with immediate address)
Sb(#IMM20<<12)
Minimum or maximum of fp32 sources into destination.
The minimum operation is chosen if the source predicate is TRUE. Otherwise, the maximum operation is used.
If the values being compared are both 0.0 then +0.0 > -0.0.
The chosen NaN behavior for fp32 operations is different than that of fp64 operations. The chosen fp32 behavior is different from Intel's x87/SSE behavior, but is still IEEE-754 2008 compliant: The standard allows canonicalization of the NaN result to be implementation-defined. See the IEEE-754 2008 specification, Section 6.2.
FMNMX R0,-R1,|R2|,PT; // MIN FMNMX R0,-|R1|,R2,!PT; // MAX